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Book synopsis

This book describes in detail the impact of process variation on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay, throughput and leakage power variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.§

Book details

Book category Books in English Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Full title: Analysis and Design of Networks-on-Chip Under High Process Variation
• Author: Rabab Ezz-Eldin, Magdy Ali El-Moursy, Hesham F. A. Hamed
• Language: English
• Binding: Hardback
• Number of pages: 141
• EAN: 9783319257648
• ISBN: 3319257641
• ID: 09545761
• Publisher: Springer International Publishing AG
• Weight: 3731 g
• Dimensions: 235 × 155 × 17 mm
• Date of publishing: 16. December 2015

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