Code: 06796876
Written expressly for hardware designers, this book presents a formal model of VHDL clearly specifying both the static and dynamic semantics of VHDL. It provides a mathematical framework for representing VHDL constructs and shows ... more
English
102.67 €
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Book synopsis
Written expressly for hardware designers, this book presents a formal model of VHDL clearly specifying both the static and dynamic semantics of VHDL. It provides a mathematical framework for representing VHDL constructs and shows how those constructs can be formally manipulated to reason about VHDL.
Book details
Book category Books in English Technology, engineering, agriculture Electronics & communications engineering Electronics engineering
102.67 €
English
Collection points Bratislava a 12734 dalších
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