Layout Optimization in VLSI Design / Najlacnejšie knihy
Layout Optimization in VLSI Design

Kód: 01414475

Layout Optimization in VLSI Design

Autor Bing Lu, Ding-Zhu Du, S. Sapatnekar

The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissi ... celý popis

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Viac informácií o knihe Layout Optimization in VLSI Design

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Anotácia knihy

The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. Audience: A reference work for graduate students, senior undergraduates, and researchers.

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Zaradenie knihy Books in English Computing & information technology Computer science

154.26

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