Kód: 19415659
This book offers a hands-on, application-oriented guide to the language and methodology of SystemVerilog Assertions and SystemVerilog Functional Coverage. Includes easy-to-understand examples, simulation logs and applications deri ... celý popis
Angličtina
151.74 €
Bežne: 168.02 €
Ušetríte 16.28 €

Nákupom získate 365 bodov
Anotácia knihy
This book offers a hands-on, application-oriented guide to the language and methodology of SystemVerilog Assertions and SystemVerilog Functional Coverage. Includes easy-to-understand examples, simulation logs and applications derived from real-world projects.
Parametre knihy
Zaradenie knihy Books in English Technology, engineering, agriculture Electronics & communications engineering Electronics engineering
151.74 €
Angličtina
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