Kód: 19415659
This book offers a hands-on, application-oriented guide to the language and methodology of SystemVerilog Assertions and SystemVerilog Functional Coverage. Includes easy-to-understand examples, simulation logs and applications deri ... celý popis
Angličtina
151.21 €
Bežne: 167.43 €
Ušetríte 16.23 €

Nákupom získate 365 bodov
Anotácia knihy
This book offers a hands-on, application-oriented guide to the language and methodology of SystemVerilog Assertions and SystemVerilog Functional Coverage. Includes easy-to-understand examples, simulation logs and applications derived from real-world projects.
Parametre knihy
Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering
151.21 €
Angličtina
Osobný odber Bratislava a 12792 dalších
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