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Book synopsis

In this work, the CPW-fed aperture-coupled patch antenna is studied for the purpose of integration with a high efficiency power amplifier. The design of a high-efficiency power amplifier using an active multi-harmonic load-pull system is described. The load-pull system is constructed using six-port circuits and can independently vary the output load of a transistor at its fundamental operating frequency, as well as at the second and third harmonics. The system is used to find the efficiency-optimizing output loads of a commercial transistor operating at a class B bias point. A power amplifier with a gain of 7.1 dB and a PAE of 58.6% operating at a fundamental frequency of 3.5 GHz with an input power of 4mW is obtained. A CPW-fed slot-coupled patch antenna is designed to act as both a radiating element and an impedance element, producing the transistor s experimentally determined efficiency-optimizing load at the fundamental frequency. A CPW circuit comprising of internally patterned series stubs is added to the input of the antenna in order to produce the transistor's optimal loads at the second- and third-harmonic frequencies.

Book details

• Full title: A High Efficiency Power Amplifier Integrated with a CPW Patch Antenna
• Subtitle: A First Design Iteration
• Author: Jean-Paul L. Prévost
• Language: English
• Binding: Paperback
• Number of pages: 124
• EAN: 9783639208450
• ID: 06828798
• Publisher: VDM Verlag Dr. Müller
• Weight: 201 g
• Dimensions: 220 × 150 × 7 mm
• Published: 2009

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