Kód: 06505237
Applied Formal Verification
Autor Harry Foster
Formal verification is a digital design method. This tutorial shows designers how to apply Formal Verification, along with hardware description languages like Verilog and VHDL, to solve real-world design problems. ... celý popis
- Jazyk:
Angličtina - Väzba: Pevná
- Počet strán: 240
Nakladateľ: McGraw-Hill Education - Europe, 2005
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Viac informácií o knihe Applied Formal Verification
Nákupom získate 320 bodov
Anotácia knihy
Formal verification is a digital design method. This tutorial shows designers how to apply Formal Verification, along with hardware description languages like Verilog and VHDL, to solve real-world design problems.
Parametre knihy
Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering
132.30 €
- Celý názov: Applied Formal Verification
- Podnázov: For Digital Circuit Design
- Autor: Harry Foster
- Jazyk: Angličtina
- Väzba: Pevná
- Počet strán: 240
- EAN: 9780071443722
- ISBN: 9780071443722
- ID: 06505237
- Nakladateľ: McGraw-Hill Education - Europe
- Hmotnosť: 508 g
- Rozmery: 231 × 154 × 23 mm
- Dátum vydania: 01. May 2005
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