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Viac informácií o knihe Compilation Techniques for Reconfigurable Architectures

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This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges- particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs).§Organized in eight chapters, this book provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures. §Key Features:§Introduces the reader to hardware compilation and reconfigurable computing architectures.§Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages.Allows the reader to bridge the gap between the software compilation and the hardware compilation and synthesis domains.§Brings a number of compilation techniques together into one structured source, and includes representative examples of their applications.§Provides a historical perspective on representative compilation research efforts over the last 15 years.

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Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Celý názov: Compilation Techniques for Reconfigurable Architectures
• Autor: Jo Cardoso, Pedro Diniz
• Jazyk: Angličtina
• Väzba: Pevná
• Počet strán: 223
• EAN: 9780387096704
• ISBN: 0387096701
• ID: 01380826
• Nakladateľ: Springer-Verlag New York Inc.
• Hmotnosť: 470 g
• Rozmery: 243 × 162 × 17 mm
• Dátum vydania: 20. October 2008

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