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Viac informácií o knihe Designing TSVs for 3D Integrated Circuits

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This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits. It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks. Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a oorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.

Parametre knihy

Zaradenie knihy Knihy po anglicky Computing & information technology Computer science Computer architecture & logic design

• Celý názov: Designing TSVs for 3D Integrated Circuits
• Autor: Nauman Khan, Soha Hassoun
• Jazyk: Angličtina
• Väzba: Brožovaná
• Počet strán: 74
• EAN: 9781461455073
• ISBN: 1461455073
• ID: 01428304
• Nakladateľ: Springer, Berlin
• Hmotnosť: 179 g
• Rozmery: 235 × 155 × 10 mm
• Dátum vydania: 25. July 2012

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