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Viac informácií o knihe Layout Optimization in VLSI Design

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Nákupom získate 373 bodov

Anotácia knihy

The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. §Audience: A reference work for graduate students, senior undergraduates, and researchers.

Parametre knihy

Zaradenie knihy Knihy po anglicky Computing & information technology Computer science Mathematical theory of computation

• Celý názov: Layout Optimization in VLSI Design
• Autor: ing Lu, ing-Zhu Du, S. Sapatnekar
• Jazyk: Angličtina
• Väzba: Brožovaná
• Počet strán: 288
• EAN: 9781441952066
• ISBN: 1441952063
• ID: 01423530
• Nakladateľ: Springer, Berlin
• Hmotnosť: 481 g
• Rozmery: 240 × 160 × 16 mm
• Dátum vydania: 21. October 2010

Obľúbené z iného súdka

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