Delay Fault Testing for VLSI Circuits / Najlacnejšie knihy
Delay Fault Testing for VLSI Circuits

Kód: 01397538

Delay Fault Testing for VLSI Circuits

Autor Angela Krstic, Kwang-Ting (Tim) Cheng

With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow w ... celý popis

154.36

Bežne: 167.22 €

Ušetríte 12.87 €


Skladom u dodávateľa
Odosielame za 10 - 13 dní
Pridať medzi želanie

Mohlo by sa vám tiež páčiť

Darujte túto knihu ešte dnes
  1. Objednajte knihu a vyberte Zaslať ako darček.
  2. Obratom obdržíte darovací poukaz na knihu, ktorý môžete ihneď odovzdať obdarovanému.
  3. Knihu zašleme na adresu obdarovaného, o nič sa nestaráte.

Viac informácií

Viac informácií o knihe Delay Fault Testing for VLSI Circuits

Nákupom získate 373 bodov

Anotácia knihy

With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the current design trend of moving towards deep submicron devices. After a long period of prevailing belief that high stuck-at fault coverage is sufficient to guarantee high quality of shipped products, the industry is now forced to rethink other types of testing. §Delay testing has been a topic of extensive research both in industry and in academia for more than a decade. As a result, several delay fault models and numerous testing methodologies have been proposed. Delay Fault Testing for VLSI Circuits presents a selection of existing delay testing research results. It combines introductory material with state-of-the-art techniques that address some of the current problems in delay testing. Delay Fault Testing for VLSI Circuits covers some basic topics such as fault modeling and test application schemes for detecting delay defects. It also presents summaries and conclusions of several recent case studies and experiments related to delay testing. A selection of delay testing issues and test techniques such as delay fault simulation, test generation, design for testability and synthesis for testability are also covered. §Delay Fault Testing for VLSI Circuits is intended for use by CAD and test engineers, researchers, tool developers and graduate students. It requires a basic background in digital testing. The book can used as supplementary material for a graduate-level course on VLSI testing.

Parametre knihy

Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

154.36

Obľúbené z iného súdka



Osobný odber Bratislava a 12790 dalších

Copyright ©2008-26 najlacnejsie-knihy.sk Všetky práva vyhradenéSúkromieCookies


Môj účet: Prihlásiť sa
Všetky knihy sveta na jednom mieste. Navyše za skvelé ceny.

Nákupný košík ( prázdny )

Vyzdvihnutie v Zásielkovni
zadarmo nad 59,99 €.

Nachádzate sa: