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Viac informácií o knihe Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

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Anotácia knihy

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

Parametre knihy

Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Celý názov: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
• Autor: Brandon Noia, Krishnendu Chakrabarty
• Jazyk: Angličtina
• Väzba: Pevná
• Počet strán: 245
• EAN: 9783319023779
• ISBN: 3319023772
• ID: 02076816
• Nakladateľ: Springer International Publishing AG
• Hmotnosť: 514 g
• Rozmery: 243 × 157 × 16 mm
• Dátum vydania: 16. November 2013

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