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Viac informácií o knihe Verilog Coding for Logic Synthesis

• Parametre knihy
• Anotácia kniha
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Anotácia knihy

Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with practical design problems that design engineers solve on a daily basis. Includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. Book is suitable for use as a textbook in EE departments that have VLSI courses.

Parametre knihy

Zaradenie knihy Knihy po anglicky Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Celý názov: Verilog Coding for Logic Synthesis
• Autor: Weng F. Lee
• Jazyk: Angličtina
• Väzba: Pevná
• Počet strán: 310
• EAN: 9780471429760
• ISBN: 0471429767
• ID: 01389469
• Nakladateľ: John Wiley & Sons Inc
• Hmotnosť: 588 g
• Rozmery: 241 × 161 × 22 mm
• Dátum vydania: 03. April 2003

Obľúbené z iného súdka

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